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Meeting Pearls 4
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Meeting Pearls Vol. IV (1996)(GTI - Schatztruhe)[!].iso
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1995-07-30
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Symbols and abbreviations
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
accumulator register A
addr 16-bit address
data 8-bit data
data16 16-bit data
port 8-bit address for I/O
r,r1,r2 one of the registers A,B,C,D,E,H,L
DDD,SSS pattern of a register (DDD is destination, SSS is source)
DDD or SSS | register
-----------+---------
111 | A
000 | B
001 | C
010 | D
011 | E
100 | H
101 | L
rp one of the register pairs BC,DE,HL,SP
RP pattern of a register pair
RP | register pair
------+--------------
00 | BC
01 | DE
10 | HL
11 | SP
SP stack pointer
PC program counter
h bevor or
after symbol the high byte of 16-bit data or address
l bevor or
after symbol the low byte of 16-bit data or address
Z Zero flag
S Sign flag
P Parity flag
CY Carry flag
AC Auxiliary carry flag
flags xxxxx represent CY P AC Z S
where x can be
- = is not changed
X = is changed
0 = becomes cleared
1 = becomes set
() content of register or address
a <-- b a gets overwritten by b
a <--> b a and b are exchanged
AND logical AND
EOR logical exclusive OR
OR logical OR
n number from 0..7
NNN binary representation of n
x[n] bit n from x
cc and CCC cc | condition | CCC
------+------------------+-------
NZ | not zerro (Z=0) | 000
Z | zero (Z=1) | 001
NC | not carry (CY=0) | 010
C | carry (CY=1) | 011
PO | parity odd (P=0) | 100
PE | parity even (P=1)| 101
P | plus (S=0) | 110
M | minus (S=1) | 111
8085 Commands
¯¯¯¯¯¯¯¯¯¯¯¯¯
Name : Move register
Syntax : MOV r1,r2
Semantic : (r1) <-- (r2)
Code : 01DDDSSS
Length : 1
Cycles : 4
Flags : -----
Description : Content of register r2 is written into r1
Name : Move from memory
Syntax : MOV r,M
Semantic : (r) <-- ((H) (L))
Code : 01DDD110
Length : 1
Cycles : 7
Flags : -----
Description : Content of cell where (H,L) points to is written into r
Name : Move to memory
Syntax : MOV M,r
Semantic : ((H) (L)) <-- (r)
Code : 01110SSS
Length : 1
Cycles : 7
Flags : -----
Description : Content of register r is written into cell where (H,L) points to
Name : Move immediate
Syntax : MVI r,data
Semantic : (r) <-- data
Code : 00DDD110 data
Length : 2
Cycles : 7
Flags : -----
Description : Value data is written into register r
Name : Move to memory immediate
Syntax : MVI M,data
Semantic : ((H) (L)) <-- data
Code : 00110110 data
Length : 2
Cycles : 10
Flags : -----
Description : Value data is written into cell where (H,L) points to
Name : Load register pair immediate
Syntax : LXI rp,data16
Semantic : (rh) <-- hdata16
(rl) <-- ldata16
Code : 00RP0001 ldata16 hdata16
Length : 3
Cycles : 10
Flags : -----
Description : Value data16 is written into register pair HL
Name : Load H and L direct
Syntax : LHLD addr
Semantic : (L) <-- (addr)
(H) <-- (addr+1)
Code : 00101010 laddr haddr
Length : 3
Cycles : 16
Flags : -----
Description : Content of cell where addr points to is written into
register L, content of cell where addr+1 points to is written
into register H
Name : Store H and L direct
Syntax : SHLD addr
Semantic : (addr) <-- (L)
(addr+1) <-- (H)
Code : 00100010 laddr haddr
Length : 3
Cycles : 16
Flags : -----
Description : Content of register L is written into cell where addr points
to, content of register H is written into cell where addr+1
points to
Name : Load accumulator indirect
Syntax : LDAX rp
Semantic : (A) <-- ((RP))
Code : 00RP1010
Length : 1
Cycles : 7
Flags : -----
Description : Content of cell where RP (only BC or DE allowed) points to
is written into accumulator
Name : Store accumulator indirect
Syntax : STAX rp
Semantic : ((RP)) <-- (A)
Code : 00RP0010
Length : 1
Cycles : 7
Flags : -----
Description : Content of accumulator is written into cell where RP (only
BC or DE allowed) points to
Name : Load accumulator direct
Syntax : LDA addr
Semantic : (A) <-- (addr)
Code : 00111010 laddr haddr
Length : 3
Cycles : 13
Flags : -----
Description : Content of cell where addr points to is written into accumulator
Name : Store accumulator direct
Syntax : STA addr
Semantic : (addr) <-- (A)
Code : 00110010 laddr haddr
Length : 3
Cycles : 13
Flags : -----
Description : Content of accumulator is written into cell where addr points to
Name : Exchange H and L with D and E
Syntax : XCHG
Semantic : (H) <--> (D)
(L) <--> (E)
Code : 11101011
Length : 1
Cycles : 4
Flags : -----
Description : Exchange the register pairs HL and DE
Name : Add register
Syntax : ADD r
Semantic : (A) <-- (A) + (r)
Code : 10000SSS
Length : 1
Cycles : 4
Flags : XXXXX
Description : Add the register r to accumulator
Name : Add memory
Syntax : ADD M
Semantic : (A) <-- (A) + ((H) (L))
Code : 10000110
Length : 1
Cycles : 7
Flags : XXXXX
Description : Add the content of cell where (H,L) points to the accumulator
Name : Add immediate
Syntax : ADI data
Semantic : (A) <-- (A) + data
Code : 11000110 data
Length : 2
Cycles : 7
Flags : XXXXX
Description : Add data to accumulator
Name : Add register with carry
Syntax : ADC r
Semantic : (A) <-- (A) + (r) + (CY)
Code : 10001SSS
Length : 1
Cycles : 4
Flags : XXXXX
Description : Add the register r and the carryflag to accumulator
Name : Add memory with carry
Syntax : ADC M
Semantic : (A) <-- (A) + ((H) (L)) + (CY)
Code : 10001110
Length : 1
Cycles : 7
Flags : XXXXX
Description : Add the content of cell where (H,L) points and the carryflag
to the accumulator
Name : Add immediate with carry
Syntax : ACI data
Semantic : (A) <-- (A) + data + (CY)
Code : 11001110 data
Length : 2
Cycles : 7
Flags : XXXXX
Description : Add data and the carryflag to accumulator
Name : Subtract register
Syntax : SUB r
Semantic : (A) <-- (A) - (r)
Code : 10010SSS
Length : 1
Cycles : 4
Flags : XXXXX
Description : Subtract register r from accumulator
Name : Subtract memory
Syntax : SUB M
Semantic : (A) <-- (A) - ((H) (L))
Code : 10010110
Length : 1
Cycles : 7
Flags : XXXXX
Description : Subtract content of cell where (H,L) points from accumulator
Name : Subtract immediate
Syntax : SUI data
Semantic : (A) <-- (A) - data
Code : 11010110 data
Length : 2
Cycles : 7
Flags : XXXXX
Description : Subtract data from accumulator
Name : Subtract register with borrow
Syntax : SBB r
Semantic : (A) <-- (A) - (r) - (CY)
Code : 10011SSS
Length : 1
Cycles : 4
Flags : XXXXX
Description : Subtract register r and carryflag from accumulator
Name : Subtract memory with borrow
Syntax : SBB M
Semantic : (A) <-- (A) - ((H) (L)) - (CY)
Code : 10011110
Length : 1
Cycles : 7
Flags : XXXXX
Description : Subtract content of cell where (H,L) points and carryflag
from accumulator
Name : Subtract immediate with borrow
Syntax : SBI data
Semantic : (A) <-- (A) + data - (CY)
Code : 11011110 data
Length : 2
Cycles : 7
Flags : XXXXX
Description : Subtract data and the carryflag from accumulator
Name : Increment register
Syntax : INR r
Semantic : (r) <-- (r) + 1
Code : 00DDD100
Length : 1
Cycles : 4
Flags : -XXXX
Description : Increment register r
Name : Increment memory
Syntax : INR M
Semantic : ((H) (L)) <-- ((H) (L)) + 1
Code : 00110100
Length : 1
Cycles : 10
Flags : -XXXX
Description : Increment content of cell where (H,L) points to
Name : Decrement register
Syntax : DCR r
Semantic : (r) <-- (r) - 1
Code : 00DDD101
Length : 1
Cycles : 4
Flags : -XXXX
Description : Decrement register r
Name : Decrement memory
Syntax : DCR M
Semantic : ((H) (L)) <-- ((H) (L)) - 1
Code : 00110101
Length : 1
Cycles : 10
Flags : -XXXX
Description : Decrement content of cell where (H,L) points to
Name : Increment register pair
Syntax : INX rp
Semantic : (rh)(rl) <-- (rh)(rl) + 1
Code : 00RP0011
Length : 1
Cycles : 6
Flags : -----
Description : Increment register pair rp
Name : Decrement register pair
Syntax : DCX rp
Semantic : (rh)(rl) <-- (rh)(rl) - 1
Code : 00RP1011
Length : 1
Cycles : 6
Flags : ------
Description : Decrement register pair rp
Name : Add register pair to H and L
Syntax : DAD rp
Semantic : (H)(L) <-- (H)(L) + (rh)(rl)
Code : 00RP1001
Length : 1
Cycles : 10
Flags : X-----
Description : Add register pair rp to HL
Name : Decimal adjust accumulator
Syntax : DAA
Semantic : (A) <-- adjusted (A)
Code : 00100111
Length : 1
Cycles : 4
Flags : XXXXX
Description : Correct the BCD number in the accumulator that has been
corrupted by an addition or subtraction. In particular
following two steps are performed:
1.) If the four lower bits of the accumulator are greater
nine or the AC flag is set then six is added to the
accumulator.
2.) If the four higher bits of the accumulator are now greater
nine or if the CY flag is set the six is added to the
higher four bits.
Name : AND register
Syntax : ANA r
Semantic : (A) <-- (A) AND (r)
Code : 10100SSS
Length : 1
Cycles : 4
Flags : 0X1XX
Description : The accumulator is combined with the register r by a logical
AND
Name : AND memory
Syntax : ANA M
Semantic : (A) <-- (A) AND ((H) (L))
Code : 10100110
Length : 1
Cycles : 7
Flags : 0X1XX
Description : The accumulator is combined with the content of cell where (H,L)
points to by a logical AND
Name : AND immediate
Syntax : ANI data
Semantic : (A) <-- (A) AND data
Code : 11100110 data
Length : 2
Cycles : 7
Flags : 0X1XX
Description : The accumulator is combined with data by a logical AND
Name : Exclusive OR register
Syntax : XRA r
Semantic : (A) <-- (A) EOR (r)
Code : 10101SSS
Length : 1
Cycles : 4
Flags : 0X0XX
Description : The accumulator is combined with the register r by a logical
exclusive OR
Name : Exclusive OR memory
Syntax : XRA M
Semantic : (A) <-- (A) EOR ((H) (L))
Code : 10101110
Length : 1
Cycles : 7
Flags : 0X0XX
Description : The accumulator is combined with the content of cell where (H,L)
points to by a logical exclusive OR
Name : Exclusive OR immediate
Syntax : XRI data
Semantic : (A) <-- (A) EOR data
Code : 11101110 data
Length : 2
Cycles : 7
Flags : 0X0XX
Description : The accumulator is combined with data by a logical exclusive OR
Name : OR register
Syntax : ORA r
Semantic : (A) <-- (A) OR (r)
Code : 10110SSS
Length : 1
Cycles : 4
Flags : 0X0XX
Description : The accumulator is combined with the register r by a logical OR
Name : OR memory
Syntax : ORA M
Semantic : (A) <-- (A) OR ((H) (L))
Code : 10110110
Length : 1
Cycles : 7
Flags : 0X0XX
Description : The accumulator is combined with the content of cell where (H,L)
points to by a logical OR
Name : OR immediate
Syntax : ORI data
Semantic : (A) <-- (A) OR data
Code : 11110110 data
Length : 2
Cycles : 7
Flags : 0X0XX
Description : The accumulator is combined with data by a logical OR
Name : Compare register
Syntax : CMP r
Semantic : (A) - (r)
Code : 10111SSS
Length : 1
Cycles : 4
Flags : XXXXX
Description : Flags are set as if the register r was subtracted from
accumulator.
Name : Compare memory
Syntax : CMP M
Semantic : (A) - ((H) (L))
Code : 10111110
Length : 1
Cycles : 7
Flags : XXXXX
Description : Flags are set as if the content of the cell where (H,L) points
to was subtracted from the accumulator
Name : Compare immediate
Syntax : CPI data
Semantic : (A) - data
Code : 11111110 data
Length : 2
Cycles : 7
Flags : XXXXX
Description : Flags are set as if the data was subtracted from the accumulator
Name : Rotate left
Syntax : RLC
Semantic : (A[n+1]) <-- (A[n]) ; (A[0]) <-- (A[7]) ; (CY) <-- (A[7])
Code : 00000111
Length : 1
Cycles : 4
Flags : X----
Description : The accumulator is shifted cyclical to the left. The highest
bit is also copied in the carry flag
Name : Rotate right
Syntax : RRC
Semantic : (A[n]) <-- (A[n+1]) ; (A[7]) <-- (A[0]) ; (CY) <-- (A[0])
Code : 00001111
Length : 1
Cycles : 4
Flags : X----
Description : The accumulator is shifted cyclical to the right. The lowest
bit is also copied in the carry flag
Name : Rotate left through carry
Syntax : RAL
Semantic : (A[n+1]) <-- (A[n]) ; (CY) <-- (A[7]) ; (A[0]) <-- (CY)
Code : 00010111
Length : 1
Cycles : 4
Flags : X----
Description : The accumulator is shifted cyclical to the left through the
the carry flag
Name : Rotate right through carry
Syntax : RAR
Semantic : (A[n]) <-- (A[n+1]) ; (CY) <-- (A[0]) ; (A[7]) <-- (CY)
Code : 00011111
Length : 1
Cycles : 4
Flags : X----
Description : The accumulator is shifted cyclical to the right through the
the carry flag
Name : Complement accumulator
Syntax : CMA _
Semantic : (A) <-- (A)
Code : 00101111
Length : 1
Cycles : 4
Flags : -----
Description : All 0 bits in the accumulator are replaced by 1 and all
1 bits by 0.
Name : Complement carry
Syntax : CMC __
Semantic : (CY) <-- (CY)
Code : 00111111
Length : 1
Cycles : 4
Flags : X----
Description : The carry flag is complemented
Name : Set carry
Syntax : STC
Semantic : (CY) <-- 1
Code : 00110111
Length : 1
Cycles : 4
Flags : 1----
Description : The carry flag is set
Name : Jump
Syntax : JMP addr
Semantic : (PC) <-- addr
Code : 11000011 laddr haddr
Length : 3
Cycles : 10
Flags : -----
Description : The program counter is set to addr
Name : Conditional jump
Syntax : Jcc addr
Semantic : If (cc)
(PC) <-- addr
Code : 11CCC010 laddr haddr
Length : 3
Cycles : 7/10
Flags : -----
Description : The program counter is set to addr if the conition is true
Name : Call
Syntax : CALL addr
Semantic : ((SP)-1) <-- (hPC)
((SP)-2) <-- (lPC)
(SP) <-- (SP) - 2
(PC) <-- addr
Code : 11001101 laddr haddr
Length : 3
Cycles : 18
Flags : -----
Description : The current program counter is saved on the stack and the
program counter is set to addr, i.e. a subroutine is called
Name : Condition call
Syntax : Ccc addr
Semantic : If (cc)
((SP)-1) <-- (hPC)
((SP)-2) <-- (lPC)
(SP) <-- (SP) - 2
(PC) <-- addr
Code : 11CCC100 laddr haddr
Length : 3
Cycles : 9/18
Flags : -----
Description : If the conition is true the current program counter is saved on
the stack and the program counter is set to addr, i.e. a
subroutine is called
Name : Return
Syntax : RET
Semantic : (lPC) <-- ((SP))
(hPC) <-- ((SP)+1)
(SP) <-- (SP) + 2
Code : 11001001
Length : 1
Cycles : 10
Flags : -----
Description : Return from a previous subroutine call
Name : Conditional return
Syntax : Rcc
Semantic : If (cc)
(lPC) <-- ((SP))
(hPC) <-- ((SP)+1)
(SP) <-- (SP) + 2
Code : 11CCC000
Length : 1
Cycles : 6/12
Flags : -----
Description : Return from a previous subroutine call if the conition is true
Name : Restart
Syntax : RST n
Semantic : ((SP)-1) <-- (hPC)
((SP)-2) <-- (lPC)
(SP) <-- (SP) - 2
(PC) <-- 8 * n
Code : 11SSS111
Length : 1
Cycles : 12
Flags : -----
Description : Same as CALL 8*n
Name : JumpHandLindirect
Syntax : PCHL
Semantic : (lPC) <-- (L)
(hPC) <-- (H)
Code : 11101001
Length : 1
Cycles : 6
Flags : -----
Description : HL is written into the program counter
Name : Push
Syntax : PUSH rp
Semantic : ((SP)-1) <-- (rh)
((SP)-2) <-- (rl)
Code : 11RP0101
Length : 1
Cycles : 12
Flags : -----
Description : Register pair rp is saved on the stack
Name : Push processor status word
Syntax : PUSH PSW
Semantic : ((SP)-1) <-- (A)
((SP)-2[0]) <-- (CY)
((SP)-2[2]) <-- (P)
((SP)-2[4]) <-- (AC)
((SP)-2[6]) <-- (Z)
((SP)-2[7]) <-- (S)
(SP) <-- (SP) - 2
Code : 11110101
Length : 1
Cycles : 12
Flags : -----
Description : The accumulator and the processor status word are saved on the
stack
Name : Pop
Syntax : POP rp
Semantic : (rl) <-- ((SP))
(rh) <-- ((SP)+1)
(SP) <-- (SP) + 2
Code : 11RP0001
Length : 1
Cycles : 10
Flags : -----
Description : Register pair rp is loaded from stack
Name : Pop processor status word
Syntax : POP PSW
Semantic : (CY) <-- ((SP)[0])
(P) <-- ((SP)[2])
(AC) <-- ((SP)[4])
(Z) <-- ((SP)[6])
(S) <-- ((SP)[7])
(A) <-- ((SP)+1)
(SP) <-- (SP) + 2
Code : 11110001
Length : 1
Cycles : 10
Flags : XXXXX
Description : The processor status word and the accumulator are loaded from
the stack
Name : Exchange stack top with H and L
Syntax : XTHL
Semantic : (L) <--> ((SP))
(H) <--> ((SP)+1)
Code : 11100011
Length : 1
Cycles : 16
Flags : -----
Description : The register pair HL is exchanged with the stack top
Name : Move HL to SP
Syntax : SPHL
Semantic : (SP) <-- (H) (L)
Code : 11111001
Length : 1
Cycles : 6
Flags : -----
Description : Register pair HL is written into SP
Name : Input
Syntax : IN (port)
Semantic : (A) <-- data
Code : 11011011 port
Length : 2
Cycles : 10
Flags : -----
Description : The data of the specified port is read into the accumulator
Name : Output
Syntax : OUT (port)
Semantic : data <-- (A)
Code : 11010011 port
Length : 2
Cycles : 10
Flags : -----
Description : The content of the accumulator is sent to the specified port
Name : Enable interrupts
Syntax : EI
Semantic : (enable interrupts) <-- 1
Code : 11111011
Length : 1
Cycles : 4
Flags : -----
Description : Interrupts are enabled
Name : Disable interrupts
Syntax : DI
Semantic : (enable interrupts) <-- 0
Code : 11110011
Length : 1
Cycles : 4
Flags : -----
Description : Interrupts are disable
Name : Read interrupt masks
Syntax : RIM
Semantic : (A) <-- (interrupt mask)
Code : 00100000
Length : 1
Cycles : 4
Flags : -----
Description : Read interrupt masks and seriell data into accumulator.
A[7] A[6] A[5] A[4] A[3] A[2] A[1] A[0]
SID I7.5 I6.5 I5.5 I7.5 M7.5 M6.5 M5.5
Name : Set interrupt masks
Syntax : SIM
Semantic : (interrupt mask) <-- (A)
Code : 00110000
Length : 1
Cycles : 4
Flags : -----
Description : Set interrupt masks and seriell data from accumulator.
A[7] A[6] A[5] A[4] A[3] A[2] A[1] A[0]
SOD SOE X R7.5 MSE M7.5 M6.5 M5.5
Name : Halt
Syntax : HLT
Semantic : (proccessor) <-- halt
Code : 01110110
Length : 1
Cycles : 5
Flags : -----
Description : The proccessor is stopped
Name : No operation
Syntax : NOP
Semantic :
Code : 00000000
Length : 1
Cycles : 4
Flags : -----
Description : Do nothing